The microelectronic industry is continually striving to produce ever faster and smaller microelectronic packages for use in various electronic products, including, but not limited to, computer server products and portable products, such as portable computers, electronic tablets, cellular phones, digital cameras, and the like. One route to achieve these goals is the fabrication of microelectronic packages having stacked microelectronic dice therein resulting in relatively small lateral dimensions, low package heights, and high bandwidth between the microelectronic devices, which are important considerations for mobile and wireless applications. Numerous microelectronic dice stacking configures are known, including wirebond-wirebond (WBWB) stacking, flip-chip/wirebond (FCWB) stacking, thru-silicon-via (TSV) stacking, as well as package-on-package (POP) configurations. However, these stacking configurations may have significant disadvantages, as will be known to those skilled in the art. Therefore, there is an ongoing effort to improve the microelectronic dice stacking for microelectronic packages.